인터커넥션 구조, 인터포저, 반도체 패키지 및 인터커넥션 구조의 제조 방법

Interconnection structure, interposer, semiconductor package and method of manufacturing interconnection structure

Abstract

PURPOSE: An interconnection structure, an interposer, a semiconductor package, and a method for manufacturing the interconnection structure are provided to simply manufacture a cavity and a lateral part by an etching process, thereby reducing manufacturing costs. CONSTITUTION: An interposer(130) comprises a substrate part and an electrode pattern part. The substrate part comprises a plurality of lateral parts and a plurality of cavities. The cavities are formed between the lateral parts. The electrode pattern part is formed on the surfaces of the lateral parts and the cavities. The surfaces of the cavities are horizontal to the surfaces of the lateral parts. The electrode pattern part electrically connects a circuit board(110) with a semiconductor chip(120).
본 발명에 따른 인터커넥션 구조는 기판부의 일면에 형성되는 복수개의 측면부 및, 상기 측면부들 사이에 위치하며 상기 측면부들보다 내측에 위치하도록 형성되는 복수개의 캐비티; 및 상기 측면부 및 상기 캐비티의 표면에 형성되는 전극 패턴부;를 포함할 수 있다.

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